Design for Embedded Image Processing on FPGAs [2nd ed.] / (Record no. 7220)

MARC details
000 -LEADER
fixed length control field 02039 a2200205 4500
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20251114134512.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 250919b |||||||| |||| 00| 0 eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9781119819790
041 ## - LANGUAGE CODE
Language code of text/sound track or separate title eng
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.39
Item number BaiD2
100 ## - MAIN ENTRY--AUTHOR NAME
Personal name Bailey, Donald G.
245 ## - TITLE STATEMENT
Title Design for Embedded Image Processing on FPGAs [2nd ed.] /
Statement of responsibility, etc Donald G. Bailey
250 ## - EDITION STATEMENT
Edition statement 2nd ed.
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Name of publisher Wiley :
Place of publication Newyork,
Year of publication ©2024
300 ## - PHYSICAL DESCRIPTION
Number of Pages xxi,465p.
520 ## - SUMMARY, ETC.
Summary, etc Introductory material will consider the problem of embedded image processing, and how some of the issues may be solved using parallel hardware solutions. Field programmable gate arrays (FPGAs) are introduced as a technology that provides flexible, fine-grained hardware that can readily exploit parallelism within many image processing algorithms. A brief review of FPGA programming languages provides the link between a software mindset normally associated with image processing algorithms, and the hardware mindset required for efficient utilization of a parallel hardware design. The bulk of the book will focus on the design process, and in particular how designing an FPGA implementation differs from a conventional software implementation. Particular attention is given to the techniques for mapping an algorithm onto an FPGA implementation, considering timing, memory bandwidth and resource constraints, and efficient hardware computational techniques. Extensive coverage will be given of a range of image processing operations, discussing efficient implementations and how these may vary according to the application. The techniques will be illustrated with several example applications or case studies from projects or applications I have been involves with. Issues such as interfacing between the FPGA and peripheral devices will be covered briefly, as will designing the system in such a way that it can be more readily debugged and tuned"-- Provided by publisher.
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical Term Embedded computer systems
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical Term Field programmable gate arrays
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type Books
Holdings
Withdrawn status Lost status Damaged status Collection code Home library Current library Shelving location Date acquired Source of acquisition Purchase Price Bill number Full call number Accession Number Copy number Print Price Bill Date/Price effective from Koha item type
      General Books Indian Institute of Technology Tirupati Indian Institute of Technology Tirupati General Stacks 18/09/2025 Creative Books 8593.62 CB/25129 621.39 BaiD2 (11676) 11676 Copy 1 12276.60 18/09/2025 Books